RevPi AIO data throughput
Brand new to RevPi and very impressed by what I have read so far. I'm thinking of setting one up with an AIO to collect data on production Automotive test stations. I'm interested in the total timing throughput of the Analog IO card to the RevPi controller. How many samples per second of an input can be realized to the controller? What is the affect on timing of using multiple input channels and multiple RevAIO cards?
Hi ChipD,
to measure the cycletime you can take a look at the variable "RevPiIOCycle" which provides the cycletimes (rounded down).
In case of the AIOs the number of used input channels has no effect on the timings only the number of modules have. With each additional AIO-Module the cycletime increases by approx. 4ms which gives you a total cycletime of about 12ms for 3 AIO-Modules for example.
If you add DIO-Modules with pwm or counters the timings won't be as consistent however. The pwm and counter values are only transmitted when there is a change in these values so one might have different message lengths on each cycle. The AIOs however send all data on every cycle which makes the timings more consistent.
to measure the cycletime you can take a look at the variable "RevPiIOCycle" which provides the cycletimes (rounded down).
In case of the AIOs the number of used input channels has no effect on the timings only the number of modules have. With each additional AIO-Module the cycletime increases by approx. 4ms which gives you a total cycletime of about 12ms for 3 AIO-Modules for example.
If you add DIO-Modules with pwm or counters the timings won't be as consistent however. The pwm and counter values are only transmitted when there is a change in these values so one might have different message lengths on each cycle. The AIOs however send all data on every cycle which makes the timings more consistent.
Thanks for your answer c.baumann! 
The inconsistencies you mention with the DIO, would they affect the AIO update cycle if they were on the other side of the RevPi (using the other PiBridge port)? In other words connect all the AIO cards on the the left side and the DIO on the right side.
Also would 2 AI modules be able to maintain a 4ms update cycle if one were on the left and the other on the right?
The inconsistencies you mention with the DIO, would they affect the AIO update cycle if they were on the other side of the RevPi (using the other PiBridge port)? In other words connect all the AIO cards on the the left side and the DIO on the right side.
Also would 2 AI modules be able to maintain a 4ms update cycle if one were on the left and the other on the right?
The side/order on which the modules are placed won't make a difference to the timings described above unfortunately.
